Efficient data management in PC meta-clusters - Łukasz Kuczyński, Roman Wyrzykowski

[SPIS TREŚCI]

CONTENTS

Preface

1. Introduction

1.1. Research background and literature review
1.2. Thesis and aims of the book

2. PC meta-clusters

2.1. Development of PC meta-clusters
2.2. PC meta-clusters as a key element of grid infrastructure
2.2.1. TeraGrid meta-cluster project
2.2.2. Other projects of creating meta-clusters and grids
2.3. Middleware of meta-clusters
2.3.1. Globus Toolkit
2.3.2. gLite package
2.4. Communication networks and data storage systems in meta-clusters
2.4.1. Communication networks in meta-clusters
2.4.2. Devices and systems for data storage

3. National Cluster of Linux Systems ClusteriX as a case study of meta-cluster

3.1. ClusteriX project
3.2. Development of the ClusteriX system architecture
3.2.1. Particular assumptions of the ClusteriX project
3.2.2. End-user applications and their requirements
3.2.3. Middleware layer
3.2.4. Hardware of the meta-cluster and software of local clusters
3.2.5. Architecture of local clusters
3.3. Running applications in the ClusteriX environment
3.3.1. Job description and running parallel applications
3.3.2. Distributed meta-applications

4. Data management systems in PC meta-clusters

4.1. General description of existing data management systems in grid environments
4.2. Architecture of data management systems in PC meta-clusters
4.2.1. Transparent data access
4.2.2. Data access optimization
4.2.3. Reliability (fault tolerance)
4.2.4. Data security
4.2.5. Distributed Data Broker

5. Development of data management systems in PC meta-clusters: case study of the ClusteriX environment

5.1. Architecture of the CDMS (ClusteriX Data Management System)
5.1.1. Global Data Catalog
5.1.2. Local Data Catalog
5.1.3. Statistic Module
5.1.4. Transport Subsystem
5.1.5. Synchronization Module
5.1.6. Replication and Optimization Modules
5.2. Implementation of the CMDS
5.3. CDMS as a virtual file system
5.4. Interface of the CDMS
5.5. Integration of end-user applications with the CDMS
5.6. Integration with the GRMS
5.6.1. Stage-in scenario
5.6.2. Stage-out scenario
5.6.3. Testing meta-application performance: case study of the NuscaS package

6. Enhancement of security, reliability and efficiency of data management systems on the basis of heterogeneous multicore Cell/B.E. processors

6.1. Architecture of Cell/B.E. processors
6.1.1. PPE core — PowerPC Processor Element
6.1.2. SPE cores — Synergistic Processor Elements
6.1.3. Communication Subsystem — Element Interconnect Bus
6.2. Programming the Cell/B.E. processor
6.2.1. The libspe2 library as a basic programming tool
6.2.2. SIMD programming
6.2.3. Vector data types
6.2.4. Vector operations
6.2.5. Vectorization
6.2.6. SDK package as a basic programming environment
6.3. Construction of an experimental computing system based on Cell processors
6.4. Using Cell/B.E. processors to increase efficiency of the CDMS system
6.4.1. Motivation for CDMS2: Secure Data Management System based on the Cell/B.E. architecture
6.4.2. CDMS2 versus CDMS: new features and functionalities
6.4.3. Cryptographic Layer

7. Systematic mapping the AES symmetric-key cryptography onto the Cell/B.E. architecture

7.1. General description of encryption algorithms
7.2. Description of the AES symmetric-key encryption algorithm
7.2.1. SubBytes step
7.2.2. ShiftRows step
7.2.3. MixColumns step
7.2.4. AddRoundKey step
7.3. Methods of mapping the AES algorithm onto the Cell/B.E. architecture
7.3.1. First scheme of mapping
7.3.2. Second scheme of mapping
7.4. Implementation of the first scheme of mapping and its performance optimizations
7.4.1. SubBytes implementation
7.4.2. Implementation of ShiftRows, MixColumns and AddRoundKey
7.5. Increasing efficiency of mapping the AES algorithm onto the Cell architecture
7.5.1. Methods of code optimization for two simultaneously ciphered blocks
7.5.2. Methods of optimization for four simultaneously ciphered blocks
7.6. Performance results for the developed implementations
7.7. Examples of applying the presented methods
7.7.1. Implementation of the Counter Mode of the AES algorithm and its performance analysis
7.7.2. Applications for encrypting/decrypting on the Sony PlayStation3 console

8. Using Cell/B.E. processors for efficient implementation of erasure codes in order to increase reliability of data management systems

8.1. Description of algorithms realizing the EC mechanism
8.2. Mapping Reed-Solomon codes onto the Cell/B.E. architecture
8.2.1. Algorithm specification
8.2.2. Mapping the algorithm onto the Cell/B.E. architecture
8.3. Using the Cell/B.E. processor to implement Cauchy Reed-Solomon codes
8.3.1. Algorithm specification
8.3.2. Mapping the algorithm onto the Cell/B.E. architecture
8.4. Performance results
8.4.1. Classical version of Reed-Solomon codes
8.4.2. Cauchy Reed-Solomon codes

9. Summary

9.1. Conclusions
9.2. Directions of further research

Bibliography

Appendix A: CDMS interface